mp

Qualification:
PhD

Electronic Design Automation, System-on Chip Architectures

Reconfigurable Architectures and Parallel Computing

Patents
1. Optimised allocation of tasks in heterogeneous computing systems, US Patent publication date 2020/4/21

Journal Publications
1. Nesma M. Rezk, Madhura Purnaprajna, Tomas Nordström, Zain Ul-Abdin: Recurrent Neural Networks: An Embedded Computing Perspective. IEEE Access 8:57967- 57996(2020)
2. Muhsen Owaida, Gabriel Falcao, Joao Andrade, Christos Antonopoulos, Nikolaos Bellas, Madhura Purnaprajna, David Novo, Georgios Karakonstantis, Andreas Burg, Paolo Ienne: From one specification to multiple platforms: Design space exploration on CPUs, GPUs and FPGAs, ACM Transactions on Embedded Computing Systems 14(2): 33:1- 33:23 (2015)
3. Madhura Purnaprajna and Paolo Ienne, Making wide-issue VLIW processor feasible on FPGAs, ACM Transaction on Architecture and Code Optimisation:8 (4): 33 (2012).
4. Madhura Purnaprajna, Mario Porrmann, Ulrich Rueckert, Michael Hussmann, Michael Thies and Uwe Kastens, Run-Time Reconfiguration of Multiprocessors Based on Compile-Time Analysis, ACM Transactions on Reconfigurable Technology, 3(3), Sep. 2010
5. Madhura Purnaprajna, Mario Porrmann, Ulrich Rueckert: Run-time reconfigurability in embedded multiprocessors. SIGARCH Computer Architecture News 37(2): 30-37 (2009)
6. Madhura Purnaprajna, Marek Reformat, Witold Pedrycz, Genetic algorithms for hardware- software partitioning and optimal resource allocation, Journal of Systems Architecture 53(7): 339-354 (2007)

Select Conference Publications
1. Gbit/s Non-Binary LDPC Decoders: High-Throughput using High-Level Specifications. Field- Programmable Custom Computing Machines, FCCM 2020: 226
2. Simmi M Bose, Varsha S Lalapura, S Saravanan, Madhura Purnaprajna: k-core: Hardware Accelerator for k-mer Generation and Counting used in Computational Genomics, accepted for publication in 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, VLSID 2019.
3. Vanishree K and Madhura Purnaprajna: Performance modeling for data distribution in heterogeneous computing systems: work in progress. Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2018, Torino, Italy, September 30 - October 05, 2018. 2018: 9:1-9:3
4. Nesma M. Rezk, Madhura Purnaprajna, Zain Ul-Abdin: Streaming Tiles: Flexible Implementation of Convolution Neural Networks Inference on Manycore Architectures. 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPS Workshops 2018, Vancouver, BC, Canada, May 21-25, 2018: 867-876
5. Sahu Sai Vikram, Vibha Pant, Mihir Mody, Madhura Purnaprajna: TileNET: Scalable Architecture for High-Throughput Ternary Convolution Neural Networks Using FPGAs. 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, VLSID 2018, Pune, India, January 6-10, 2018: 461- 462
6. Meena Belwal, Madhura Purnaprajna and Sudarshan TSB, Enabling Seamless Execution on Hybrid CPU/FPGA Systems: Challenges & Directions, International Conference on Field Programmable Logic, (FPL) 2015.
7. Madhura Purnaprajna, Paolo Ienne: A Case for Heterogeneous Technology-Mapping: Soft Versus Hard Multiplexers. International Symposium on Field-Programmable Custom Computing Machines (FCCM),2013: 53-56
8. Hadi Parandeh-Afshar, Grace Zgheib, David Novo, Madhura Purnaprajna, Paolo Ienne: Shadow And-Inverter Cones. International Conference on Field Programmable Logic and Applications (FPL) 2013: 1-4.
9. G. Falcao, M. Owaida, D. Novo, M. Purnaprajna, N. Bellas, C.D. Antonopoulos, G. Karakonstantis, A. Burg, P. Ienne, "Shortening Design Time through Multiplatform Simulations with a Portable OpenCL Golden-model: The LDPC Decoder Case," International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2012
10. Mario Porrmann, Madhura Purnaprajna, Christoph Puttmann: Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance. NASA/ESA Conference on Adaptive Hardware and Systems 2009: 467-473 (Invited paper)
11. Madhura Purnaprajna, Christoph Puttmann and Mario Porrmann, Power Aware Reconfigurable Multiprocessor Elliptic Curve Cryptography, Design, Automation and Test in Europe, March 2008.
12. Madhura Purnaprajna, Christopher Pohl, Mario Porrmann and Ulrich Rueckert, Energy Efficient Mapping of Self-Organizing Maps on Multiprocessors via Reconfiguration, Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), July 2009