Dr Shashidhar Tantry

Qualification :

  • B E (Electronics and Communication)
  • M E (Systems Engineering)
  • Ph D (Analog Circuits for Neural Networks)

Work Experience:

  • 17 years in Industry
  • 3 Years in Teaching
  • 1 year in Research


Professional Membership
IEEE Solid State Circuits Society, Senior Member

Teaching Experience :

  • Microelectronics
  • Fundamentals of CMOS VLSI
  • ASIC
  • Synthesis and Optimization of Digital Circuits
  • CAD for VLSI
  • Application Specific Integrated Circuits

Research Experience :

  • High Voltage CMOS designs
  • Low Power CMOS circuits CAD algorithms

  • Nelson G, Suhas P, Rajeshwar H, Rishita V and Shashidhar Tantry “Performance comparison of comparators used in SAR ADCs for ultra low power biomedical applications” 3rd International Conference on New Frontiers of Engineering, Science, Management and Humanities 2018
  • Dhanashree Bhate, Shashidhar Tantry, Jayant G, Naveeen Kumar A “Implementation of DC motor speed control logic on FPGA”, IEEE International Conference for Convergence in Technology 2018.
  • Pankaja H C, Shashidhar Tantry, “Design and analysis of CMOS based temperature sensor”, International Journal of scientific research in science and technology, Vol.5, Issue 3, May-June 2018, page 191-196.
  • Pankaja H C, Shashidhar Tantry, “Design and analysis of CMOS based temperature sensor”, Conference on Recent Innovations in Science and Engineering 2018
  • Shashidhar Tantry, Sharanu Devakki, “A Current controlled floating resistor”, Asain Journal of Convergence and Technology, Vol. 4 Issue 2
  • Rohan Srinath, G N Prasanna Patil, S Pratiksha Shetty, Venkatesh Pampana and Shashidhar Tantry “A Capacitive sensor readout circuit with low power mode and variable gain operations” International Conference on Microelectronic Devices, Circuits and Systems 2017
  • Sharanu Devakki and Shashidhar Tantry “A positive negative floating resistor circuit with control voltage on high impedance” International Conference on Energy, Communication, Data Analytics and Soft Computing 2017
  • Sharanu Devakki and Shashidhar Tantry “An improved Bilateral floating resistor circuit with positive and negative resistance” International Journal of science and research, RISE 2017, page 15-17.
  • Sharanu Devakki and Shashidhar Tantry “An improved Bilateral floating resistor circuit with positive and negative resistance” Conference on Recent Innovations in Science and Engineering 2017
  • Kruthika Simha, Shreya, Chetan Kumar, Parinitha, Shashidhar Tantry, “Electronic Notice Board with multiple output display” International Conference on Signal Processing, Communication, Power and Embedded Systems 2016.
  • Mathew George, P Cyril Prasanna Raj, T.J.Martin, M. Tim, Shashidhar Tantry “Modelling, Design and Implementation of a 2.4 GHz Low-Noise CMOS VCO for ISM Band Applications” SASTech Journal Vol.8 
    Issue 1
  • V Acharya, S Kakde, S Tantry, H Koyama, “Design and implementation of Class AB CMOS power amplifier using GSMC 0.15u Technology” Proceedings, VDAT 2005
  • S Tantry, Y Hiraku, T Oura, T Yoneyama, H Asai, “A low voltage floating resistor circuit having both positive and negative resistance values” IEICE Transactions on Fundamentals, Vol E86A, No.2, Feb 2003
  • S Tantry, T Oura, T Yoneyama, H Asai, “A low voltage floating resistor circuit having both positive and negative resistance values” Proceedings, Asia Pacific Conference on Circuits and Systems, 2002
  • T Oura, T Yoneyama, S Tantry, H Asai, “A CMOS floating resistor having both positive and negative resistance values” IEICE Transactions on Fundamentals, Vol E85A, No.2, Feb 2002
  • T Oura, T Yoneyama, S Tantry, H Asai, “Threshold independent floating resistor circuit exhibiting both positive and negative resistance values” Proceedings, IEEE international symposium on circuits and systems, 2002, pp 739-742
  • S Tantry, T Yoneyama, H Asai, “Two floating resistor circuits and their applications to synaptic weights in analog neural networks” Proceedings, IEEE international symposium on circuits and systems, 2001, pp 564-567
  • S Tantry, T Yoneyama, H Asai, “A structure to realise various kinds of floating resistors” Shizuoka University, Department of Electronics and material science, Research report, 2002
  • S Tantry, T Oura, T Yoneyama, H Asai, “A floating resistor with positive and negative values operating at lower supply voltages” Proceedings, ITC-CSCC, 2002, pp 327-330
  • S Tantry, “floating resistors as synaptic weights in analog neural networks” Proceedings, NOLTA, 1999